High quality, multimedia and networking consumer electronics devices require efficient high-performance Digital Signal Processing (DSP) capabilities. Example devices are high-resolution displays, networked video camera recorders, digital satellite and cable TV receivers, personal video recorders, cell phones, video game boxes and high-speed Wireless Local Area Network (WLAN) devices. These devices employ variety of communication, video, 3-D graphics DSP applications and algorithms and data elements in multiple data sets. Innovative organization and structuring of the processing tasks is required to deliver efficient, high-performance, cost-competitive solutions. This is especially important in VLSI IC implementations due to potential cost, power consumption and performance implications.
Some of the commonly used consumer electronic device applications and capabilities are video encode, decode, high speed wireless data transfer, video and image display processing. Each application may employ one or more DSP algorithms such as motion estimation, compensation, stereo disparity match, Fast Fourier Transform, cross correlation, filtering of time sampled data sequences, video, and image pre and post filtering. These applications can be structured hierarchically. At the lowest level of the hierarchy, one or more DSP algorithms are repeatedly applied to groups of data elements.
High performance DSP systems generally consist of one or more DSP ICs suitably connected to other devices. The currently available DSP ICs range from fixed function hard-wired to software programmable processors. In hard-wired IC and system implementations, internal or external memory elements are used to store and retrieve entire data sets used or created by DSP operations. Innovative mechanisms that result in efficient data access and reuse would thus be beneficial to such implementations. In the absence of such innovations, high-quality devices require high-speed memory elements for repeated access and retrieval of data elements resulting in higher-cost, lower power consumption efficiency and shorter battery life in portable devices.
Alternatively, software programmable processors containing internal or external special purpose elements, such as data cache, can benefit from innovative data reuse strategies. Many high-quality, high-performance systems require DSP capability beyond the ability of current single processor systems, thus necessitating the need for multiple processors. Therefore, optimal data reuse strategies that are scalable to various numbers of processing units are needed.
It can thus be appreciated that a need exists for scalable, high-performance mechanisms suitable for efficient VLSI implementation and capable of meeting the processing demands of high-quality consumer electronics DSP systems.